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Logic Type : J-K Flip-Flop
Packaging : Tube
Product Category : Flip Flops
Mounting Style : SMD/SMT
Minimum Operating Temperature : - 40 C
Logic Family : LVC
Supply Voltage - Max : 3.6 V
Input Type : CMOS, TTL
Package / Case : TSSOP-16
Maximum Operating Temperature : + 85 C
Propagation Delay Time : 7.1 ns
High Level Output Current : - 24 mA
Number of Circuits : 2
Low Level Output Current : 24 mA
Polarity : Inverting/Non-Inverting
Output Type : LVTTL
Manufacturer : Texas instruments
Description : Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
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SN74LVC112APW Images |